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ADE7753
Parameter
Channel 2
Signal-to-Noise Plus Distortion
Bandwidth (–3 dB)
Spec
60
140
Unit
dB typ
Hz
Test Conditions/Comments
See the Channel 2 Sampling section
150 mV rms/60 Hz, gain = 2
CLKIN = 3.579545 MHz
REFERENCE INPUT
REF IN/OUT Input Voltage Range
Input Capacitance
ON-CHIP REFERENCE
Reference Error
Current Source
Output Impedance
Temperature Coefficient
CLKIN
Input Clock Frequency
2.6
2.2
10
±200
10
3.4
30
4
1
V max
V min
pF max
mV max
μA max
kΩ min
ppm/°C typ
MHz max
MHz min
2.4 V + 8%
2.4 V – 8%
Nominal 2.4 V at REF IN/OUT pin
All specifications CLKIN of 3.579545 MHz
LOGIC INPUTS
RESET, DIN, SCLK, CLKIN, and CS
Input High Voltage, V INH
Input Low Voltage, V INL
Input Current, I IN
Input Capacitance, C IN
2.4
0.8
±3
10
V min
V max
μA max
pF max
DV DD = 5 V ± 10%
DV DD = 5 V ± 10%
Typically 10 nA, V IN = 0 V to DV DD
LOGIC OUTPUTS
SAG and IRQ
Open-drain outputs, 10 kΩ pull-up resistor
Output High Voltage, V OH
Output Low Voltage, V OL
4
0.4
V min
V max
I SOURCE = 5 mA
I SINK = 0.8 mA
ZX and DOUT
Output High Voltage, V OH
Output Low Voltage, V OL
4
0.4
V min
V max
I SOURCE = 5 mA
I SINK = 0.8 mA
CF
Output High Voltage, V OH
Output Low Voltage, V OL
POWER SUPPLY
AVDD
DVDD
AI DD
DI DD
4
1
4.75
5.25
4.75
5.25
3
4
V min
V max
V min
V max
V min
V max
mA max
mA max
I SOURCE = 5 mA
I SINK = 7 mA
For specified performance
5 V – 5%
5 V + 5%
5 V – 5%
5 V + 5%
Typically 2.0 mA
Typically 3.0 mA
1
2
See the Terminology section for explanation of specifications.
See the Analog Inputs section.
TO
200 μ A
I Ol
OUTPUT
PIN
C L
50pF
1.6mA
I OH
+2.1V
02875-0-002
Figure 2. Load Circuit for Timing Specifications
Rev. C | Page 5 of 60
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